Silicon carbide (SiC) is a high-hardness semiconductor material with a greater bandgap than silicon (Si), and has been used extensively in various types of semiconductor devices including power elements, hostile-environment elements, high temperature operating elements, and radio frequency elements. Among other things, the application of SiC to power elements such as switching elements and rectifiers has attracted a lot of attention. This is because a power element that uses SiC can significantly reduce the power loss compared to a Si power element.
Among various power elements that use SiC, switching elements such as a MOSFET and a MESFET are known as typical ones. Such a switching element can switch between ON state in which drain current of several amperes (A) or more flows and OFF state in which the drain current becomes zero by changing the voltages applied to its gate electrode. Also, in the OFF state, SiC will achieve as high a breakdown voltage as several hundred volts or more. As for rectifiers, a Schottky diode, a pn diode and other SiC rectifiers have already been reported and are all expected to be rectifiers that can operate with a huge amount of current and with a high breakdown voltage.
Many of those power elements adopt a structure in which current flows perpendicularly to the principal surface of the substrate (which will be referred to herein as a “vertical direction”). In this description, one side of a silicon carbide substrate on which major structures of the element are to be formed will be referred to herein as the “principal surface”, and the other side of the substrate, opposite to the principal surface, will be referred to herein as a “back surface”. Such an element is sometimes called a “vertical element”. In most vertical elements, an electrode that has been patterned using photoresist will be arranged on their principal surface, while their back surface will be almost entirely covered with an ohmic electrode.
A vertical switching element that uses SiC is disclosed in Patent Document No. 1, for example. Hereinafter, the structure of a vertical MOSFET will be described with reference to the accompanying drawings.
FIG. 11 is a schematic cross-sectional view illustrating a unit cell 1000 of a vertical MOSFET that uses SiC. It should be noted that a vertical MOSFET typically has a plurality of unit cells.
The unit cell 1000 of the vertical MOSFET includes a silicon carbide epitaxial layer 120 that has been formed on the principal surface of an n-type SiC substrate 101 with low resistivity, a channel layer 106 that has been formed on the silicon carbide epitaxial layer 120, a gate electrode 108 that is arranged over the channel layer 106 with a gate insulating film 107 interposed between them, a source electrode 109 that contacts with the surface 120s of the silicon carbide epitaxial layer, and a drain electrode 110 arranged on the back surface of the SiC substrate 101.
The silicon carbide epitaxial layer 120 has a well region 103, of which the conductivity type (i.e., p-type in this example) is different from that of the SiC substrate 101, and a drift region 102, which is the rest of the silicon carbide epitaxial layer 120 other than the well region 103. More specifically, the drift region 102 is an n−-type silicon carbide layer including an n-type dopant, of which the concentration is lower than in the SiC substrate 101. Inside the well region 103, defined are an n-type heavily doped source region 104 including an n-type dopant and a p+-type contact region 105 that includes a p-type dopant at a higher concentration than the well region 103. The well region 103, the source region 104 and the contact region 105 are defined by performing the process step of implanting dopants into the silicon carbide epitaxial layer 120 and a high-temperature heat treatment process step (i.e., activating annealing process step) that activates the dopants that have been introduced into the silicon carbide epitaxial layer 120.
The source region 104 and the drift region 102 are connected together through the channel layer 106, which may be a 4H—SiC layer that has been formed on the silicon carbide epitaxial layer 102 by epitaxy process, for example. Also, the contact region 105 and the source region 104 make ohmic contact with the source electrode 109. Consequently, the well region 103 is electrically connected to the source electrode 109 via the contact region 105.
The source electrode 109 can be formed by depositing a conductive material such as Ni on the source region 104 and the contact region 105 of the silicon carbide epitaxial layer 120 and then annealing the material at a high temperature. Normally, the source electrode 109 is obtained by performing a post deposition annealing process at as high a temperature as about 1,000° C. According to this method, a reaction layer is formed in the interface between the conductive material layer and the source region 104 and between the conductive material layer and the contact region 105 as a result of the high-temperature annealing process. For that reason, the source electrode 109 thus obtained will have good ohmic property with respect to these regions 104 and 105. More specifically, if the material of the source electrode is Ni, then Ni would react to Si in the silicon carbide layer to produce Ni silicide. Meanwhile, C in silicon carbide would be introduced into the Ni silicide film and an impurity level would be produced by C in the interface between Ni silicide and silicon carbide to form an ohmic junction there.
The gate insulating film 107 may be a thermal oxide film (i.e., SiO2 film) that has been formed by heating and oxidizing the surface of the channel layer 106, for example. The gate electrode 108 may be made of electrically conductive polysilicon, for example.
The gate electrode 108 is covered with an interlevel dielectric film 111 with a hole 120s. Through this hole 120s, the source electrode 109 of each unit cell is connected in parallel to an upper electrode layer (e.g., an Al electrode) 112
The drain electrode 110 is also required to have ohmic properties. That is why Ni is also used as a material for the drain electrode 110. Specifically, the drain electrode 110 is obtained by depositing Ni on the back surface of the silicon carbide substrate 101 and then annealing it at as high a temperature as about 1,000° C. A reverse electrode 130 is further formed for assembly purposes on the surface of the drain electrode (corresponding to the lower surface of the drain electrode shown in FIG. 11). In most cases, the reverse electrode 130 is a multilayer electrode consisting of Ti, Ni and Ag layers, for example, which are stacked one upon the other so that Ti contacts with the drain electrode 110.
The ends of the upper electrode layer 112 on the principal surface are covered with a passivation layer (not shown) made mostly of SiN, thereby minimizing breakdown of the device due to creeping discharge on the principal surface. That passivation layer is deposited over the entire surface of the upper electrode layer and excessive portions thereof are etched away. The drain electrode 110 on the back surface needs to be protected while an etching process is carried out on the principal surface. For example, the drain electrode 110 could be protected by depositing photoresist over the reverse ohmic electrode 110, performing patterning on the principal surface of the device, removing the photoresist from the back surface, and then forming the back surface electrode as disclosed in Patent Document No. 2.                Patent Document No. 1: Japanese Patent Application Laid-Open Publication No. 2004-519842        Patent Document No. 2: Japanese Patent Application Laid-Open Publication No. 2003-243654        